New-Tech Europe Magazine | Q2 2021

Table 1: Revenue trends for hardware-assisted verification show growth. (Image source: The ESD Alliance, a SEMI Technology Community)

Figure 1: Data center networking adds a host of verification challenges. (Image source: Siemens EDA) property (IP) level and proceeds all the way to the post-silicon test lab is a necessity. In a complete verification/validation cycle, the flow encompasses simulation, emulation, prototyping, unit testing, system integration, and post-silicon testing. Simulation is aimed at IP/block-level verification. Hardware emulation takes over from simulation to perform sub-system verification and, in combination with FPGA prototyping, verifies and validates the full system including software through tape-out. A well- integrated suite of emulation and prototyping platforms can share the

possess three traits: platform, applications, and ecosystem. As for the platform, its capacity must reach 15 billion gates with scalability starting at one billion gates, while maintaining consistent speed of execution across all configurations. It ought to support ternary content- addressable memories (TCAMs) natively to avoid cumbersome and inefficient modeling. Equally important, the communication channel between the test environment and the device under test (DUT) running in the emulator must exhibit wide bandwidth and low latency to accommodate the increasing number of ports. As for applications, both in- circuit emulation (ICE) and virtual deployment are necessary. Deterministic debugging is a must for ICE, and a rich set of speed adapters is essential. For virtual mode, an expanded library of proven virtual solutions (such as VirtuaLAB Ethernet and VirtuaLAB PCIe from Siemens) is mandatory. Communications and 5G Two characteristics the communication market, specifically 5G applications, stand out. First, a of

stream of about 50,000 5G patents in 2018 demonstrates deployment acceleration. Second, specialized semiconductor content is required to meet low power, performance, size, and latency, across a range of applications such as smart devices and cities, IoT edge products, virtual reality, digital industry applications, virtual reality, and autonomous driving vehicles. Hardware Emulation for 5G To address 5G design verification, a comprehensive, end-to-end suite of tools integrated in a flow that starts at the pre-silicon intellectual

Figure 2: A 5G end-to-end, pre- and post-silicon development and verification flow encompasses simulation, emulation, prototyping, unit testing, system integration, and post-silicon testing. (Image source: Siemens EDA)

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