New-Tech Europe Magazine | H2 2023

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NeoLogic Unveils Novel Processor Design Technology at 16nm, Promising Significant Power, Cost, and Area Reductions

NeoLogic Unveils Novel Processor Design Technology at 16nm, Promising Significant Power, Cost, and Area Reductions. Novel standard cells for 5nm and 3nm technology nodes are under development. The company expects to tapeout a 16nm ARM processor for demonstration this coming December.

the number of transistors. This breakthrough benefits the logic synthesis as well as the physical design. Dr. Avi Messica, Co-founder and CEO of NeoLogic, stated: “Utilizing Quasi-CMOS for

processor development delivers a technological leap in performance. Our design technology enables us to design a 16nm processor that delivers performance equivalent to more

Credit: NeoLogic

advanced – sub 16nm – technology nodes, while saving development (NRE) and manufacturing (OPEX) costs. Reducing the processor’s power consumption in data centers leads to significant cost savings (cooling, electricity, infrastructure).” NeoLogic, which recently secured an 8-million-dollar seed funding, was founded in 2021 by Dr. Avi Messica (CEO) and Ziv Leshem (CTO), both of whom have decades of experience in R&D and management of microprocessors design and fabrication. Dr. Avi Messica (Ph.D. Weizmann Institute of Science) is an expert in solid-state physics and quantum devices and in ultrafast transistors in particular with 26 years of managerial experience in a variety of hi-tech companies. Messica previously served as a device group manager at Tower Semiconductors and has hands on experience in the design and fabrication of CMOS devices. He also served as VP of Engineering at Shellcase and founded and served as the CEO of three semiconductor companies in the fields of image sensors, MEMS-based optical switches, and photonic chips. Ziv Leshem has 25 years of experience in processor design. He worked for some of the world’s leading semiconductor companies, such as National Semiconductors, DSPG, and Synopsys, and managed complex processor design projects. He was one of the founders of LogixL, a company that developed a hardware-based HDL simulator and also served as a manager at NewSight Imaging, a developer of LiDAR and iTOF sensors. Before founding NeoLogic he was the manager of the physical design group at Inomize where he managed a group of engineers and developed processors for customers in various industrial sectors in CMOS technologies ranging from 40nm to 7nm.

Israeli processor technology startup NeoLogic is launching a groundbreaking processor design technology that is poised to revolutionize chip design. The company expects to tapeout an ARM processor at 16 nanometers for demonstration this December. The technology and the processor will be available for evaluation to key selected customers. NeoLogic’s Quasi-CMOS technology serves as a platform for processor design. It delivers high computing power in tandem with reduced power consumption and cost. The company has completed the development of new, non existing, standard cells for the 16nm technology node, on top of the existing CMOS standard cells library. NeoLogic’s standard cells are single-stage high fan-in (8 to 16 inputs), among others, leading to up to 50% reduction in power consumption compared to the most advanced equivalent CMOS cells while saving up to 40% of the area. The technology was conceived to address the increasing workloads in data centers and the need to reduce the high costs associated with developing processors using advanced technology nodes. Designing processors with Quasi-CMOS delivers superior computing power per watt per millimeter square, catering to the escalating workloads of artificial intelligence, machine learning, data analysis, video streaming, and more in data centers. CMOS technology, which has been the “workhorse” of processor design and fabrication for the past 40 years, is nearing its limits and is challenging to improve. Quasi-CMOS breaks through these limitations by significantly increasing the maximum number of inputs of standard cells and by changing their topology to reduce

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