New-Tech Europe | Aug 2019 | Digital Edition

August 2019

16 A 3D technology

toolbox in support of system-technology co- optimization 20 Understanding Component Shortages 24 Industrial Miniaturization:How Compact Can a GigE Vision Camera Get ? 28 24 GHz to 44 GHz Wideband Integrated Upconverters and Downconverters Boost Microwave Radio Performance While Reducing Size

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14 LATEST NEWS 16 A 3D technology toolbox in support of system- technology co-optimization 20 Understanding Component Shortages 24 Industrial Miniaturization:How Compact Can a GigE Vision Camera Get ? 28 24 GHz to 44 GHz Wideband Integrated Upconverters and Downconverters Boost Microwave Radio Performance While Reducing Size 32 Tensilica HiFi 5 DSP Voice control everywhere






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New-Tech Magazine Europe l 9

Latest News

OSRAM invests in Autonomous Driving AI Start-up Recogni

Fluxunit, OSRAM’s Venture Capital armjoins leading VC funds well as automotive OEMs and Tier-1 suppliers in the financing round of Recogni. The Silicon Valley start-up with subsidiary in Munich develops a vision-oriented artificial intelligence (AI) platform for autonomous vehicles,

magnitude superior to anything we have seen. Further, this is a team we’ve known for years and have backed in the past. They are the right group to not only develop this promising technology but also get it into the hands of the auto OEMs.” “We truly believe in sensor fusion based on camera,

which allows the processing of sensor data from LIDAR (Light Detection and Ranging, a sensor based on infrared light for 3D machine vision that can be used to detect distances amongst other things), camera and RADAR systems in real-time and at low power consumption. Besides Fluxunit, GreatPoint Ventures, Toyota AI Ventures, BMW iVentures, Faurecia, DNS Capital, amongst others partake in the $25 million financing round. As the automotive industry is transitioning to autonomous vehicles, a network of computers is needed to drive these vehicles efficiently on a limited energy budget. While these AI systems are trained offline, they need to process the sensor data in real-time in the vehicle. Today, autonomous vehicles have hit the processing efficiency wall and are unable to transition to the next level of autonomy and beyond. Recogni is focused on creating high-performance and low-power AI processing to help make autonomous vehicles a reality. Founded in 2018 and headquartered in San Jose, California, the company is positioning itself to revolutionize the processing of sensor data for Level 2+ autonomous vehicles. Using a Vision Cognition Processor, Recogni will solve the problem of running perception algorithms in the vehicle in real-time and at low power consumption. The company’s founders possess deep industry experience in system design, AI, vision, and custom silicon design. “We see a huge opportunity here to truly achieve the goal of full vehicle autonomy with the Recogni platform,” said Ashok Krishnamurthi, Managing Partner at GreatPoint Ventures. “While scoping the market, we realized that most of the neural network accelerator technologies are either optimized for performance or power – none are optimized for both. We believe that the Recogni platform is orders of

RADAR, and LIDAR, but the computational requirements for processing the flood of data in real time and running perception algorithms on the edge remain one of the critical bottlenecks in autonomous driving today”, explains Sebastian Stamm, Investment Manager at Fluxunit – OSRAM Ventures. “Recogni solves this problem with a unique and disruptive approach – we are proud to back this team of world-class IC- and system developers as well as automotive AI experts.” Recogni plans to use the funds to deliver the most capable perception system to enable state of the art sensor fusion of visual and depth sensor data while continuing to grow its top-tier engineering team. Recogni is currently in discussions with multiple auto manufacturers, to provide them with the full suite of enabling technology from modules to the software. “The issues within the Level 2+, 3, 4 and 5 autonomy ecosystem range from capturing/generating training data to inferring in real-time. These vehicles need datacenter class performance while consuming minuscule amounts of power,” said RK Anand, CEO of Recogni. “Leveraging our background in machine learning, computer vision, silicon, and system design, we are engineering a fundamentally new system that benefits the auto industry with very high efficiency at the lowest power consumption.” The investment in Recogni underlines OSRAM’s transition from a lighting company towards a high-tech photonics company in various future applications such as autonomous driving. Via its venture arm Fluxunit, OSRAM will contribute their extensive know-how in semiconductors for lighting as well as sensing applications in the automotive industry.

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Latest News

Researchers at the Forschungszentrum Jülich develop novel process for structuring quantummaterials

Already the Incas used knots in cords in their ancient writing “Quipu” to encode and store information. The advantage: Unlike ink on a sheet of paper, the information stored in the knots is robust against external destructive influences such as water. Novel quantum computers should also be able to store information robustly in the form of knots. For this, however, no cord is knotted, but so-called quasiparticles in space and time. What you need to build such a quantum-knot-machine are new materials, so called quantum materials. Experts speak of topological insulators and superconductors. The processing of these materials into components for quantum computers is a challenge in itself, especially because topological insulators are very air-sensitive. Scientists at the Forschungszentrum Jülich have now

developed a novel process that makes it possible to structure quantum materials without exposing them to air during processing. The so-called “Jülich process” makes it possible to combine superconductors and topological insulators in the ultra-high vacuum and thereby produce complex components. First measurements in their

devices show indications of Majorana states. “Majoranas” are precisely the promising quasiparticles that are to be knotted in the shown networks of topological insulators and superconductors in order to enable robust quantum computing. In a next step, the researchers at the Peter- Grünberg Institute, together with their colleagues from Aachen, the Netherlands and China, will equip their networks with read-out and control electronics in order to make the quantum materials accessible for application.

Pliops Named ‘Most Innovative Flash Memory Startup’ at Flash Memory Summit 2019

Technology innovator Pliops announced that it has been awarded a Flash Memory Summit (FMS) 2019 ‘Best of Show Award’ in the ‘Most Innovative Flash Memory Startup’ category. Pliops was on hand at FMS to give the first- ever public demonstrations of its new, patent-pending Storage Processor that accelerates database storage functions.

new technology innovation to accelerate workloads. We are proud to recognize Pliops as the Most Innovative Flash Memory Startup. Their Pliops Storage Processor is capable of accelerating MySQL applications by up to 7x and reducing compressed data by up to 50% to achieve new levels of scale, speed and cost effectiveness.”

Pliops has created a new architecture that overcomes the major inefficiencies of software-only storage engines via a dedicated hardware product. Pliops’ solution solves the scalability challenges raised by the cloud data explosion and the increasing data requirements of artificial intelligence and machine learning applications. The company is on a

“Webscale and hyperscale environments demand new levels of performance to address cloud databases and applications,” said Jay Kramer, Chairman of the awards program and president of Network Storage Advisors, Inc. “Further, data center infrastructure needs to advance with

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Latest News

mission to enable the accelerated data center, and is joined in pursuing this vision by investors Softbank Ventures Asia, Intel Capital, Western Digital, Xilinx, and Mellanox. “Slowing compute performance growth has come up against rapidly increasing storage and network performance growth,

creating a perfect storm of server sprawl and increased data center costs,” noted Steve Fingerhut, president and chief business officer for Pliops. “Pliops is driving hard to ensure companies of all sizes can meet growing workload demands. We’re honored that our efforts to solve these challenges have been recognized by FMS.”

BMW Group Plant Spartanburg doubles battery production capacity

BMW Group Plant Spartanburg in the US state of South Carolina has doubled its capacity for production of high-voltage batteries. The plant’s own battery facility now produces the new fourth- generation batteries. These are intended for the plug- in hybrid models of the new BMW X5 and the future BMW X3, also produced in Spartanburg.

CEO, BMW Manufacturing, Co., LLC. In the past four years, the plant’s battery assembly team has produced a total of more than 45,000 batteries. Further investment in production of BMW X5 and BMW X3 plug-in hybrids Between 2015 and 2018, BMW Group Plant Spartanburg

built the first series produced plug-in hybrid vehicle, the BMW X5 xDrive40e (combined fuel consumption: 3,3 l/100km; combined power consumption: 15,3 kWh/100km ; combined CO2-emission: 77 g/km), for the core BMW brand. The start of production for the new BMW X5 xDrive45e (combined fuel consumption: 2,0-1,7 l/100km*; combined power consumption: 23,5-20,3 kWh/100km*; combined CO2-emission: 47-39 g/km*) will be in August 2019; production of the BMW X3 xDrive30e (combined fuel consumption: from 2,4 l/100 km*; combined power consumption: from 22,7 kWh/100 km*; combined CO2- emission: from 56 g/km*; provisional figures) will get underway in December. “The BMW X5 and BMW X3 are currently among the top- selling BMW models in the US. We expect their plug-in hybrid variants to be just as popular with customers,” adds Flor. Since the start of the year, the BMW Group has invested a further ten million US dollars in production of plug-in hybrid models. An additional 225 vehicle assembly workers

“We have invested around ten million US dollars in a new battery assembly line and expanded the area to more than 8,000 square metres. This means we could double the number of batteries produced if needed to meet market demand,” explains Michael Nikolaides, Senior Vice President Engines and Electrified Drivetrains, BMW Group. The new assembly line will be able to produce different types of fourth-generation batteries to serve the growing range of electrified vehicles locally. These batteries are based on a new technology concept that further enhances their performance. More than 120 people will be employed in battery production at Plant Spartanburg by the end of the year, having completed a comprehensive training programme to acquire the technological know-how needed for battery production. “We have produced batteries on site at Plant Spartanburg since 2015 – making the BMW Group a pioneer for electromobility in the US,” says Knudt Flor, President and

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received training in the production of electrified

Group Plant Dingolfing in Germany, at BMW Group Plant Spartanburg in the US and at Plant Powertrain of its joint venture, BMW Brilliance Automotive (BBA). The BMW Group also produces batteries for local car production in cooperation with a partner in Thailand. The BMW Group’s battery research and pilot plant are located in Munich.

vehicles, adding to the Plant’s already skilled staff.

International production network for batteries The BMW Group currently has three battery facilities: at the Competence Centre for E-drive Production at BMW

Microsoft acquires BlueTalon, simplifying data privacy and governance across modern data estates

The data landscape has changed rapidly over the past few years, enabling tremendous opportunity for enterprises to digitally transform. Data estates are increasingly diverse with fit- for-purpose systems (NoSQL, RDBMs, Data Lakes & Big Data, SaaS apps, etc.) spanning on-

Today we are excited to announce the acquisition of BlueTalon, a leading provider of Unified Data Access Control solutions for modern data platforms. BlueTalon works with leading Fortune 100 companies to eliminate data

premises and cloud environments capable of processing data of all shapes and sizes. This rapid evolution has empowered data professionals including data engineers, data scientists and data analysts to do much more, but at the same time has vastly increased the size and diversity of data estates, making data management and governance harder than ever. In fact, 57 percent of Gartner survey respondents cited “supporting data governance and data security” as one of the biggest challenges for their data management practice.1 At the heart of any digital transformation is making data discovery, access and use simple, secure, compliant and trustworthy. Data privacy is one of the defining issues of our time, as evidenced by the introduction and evolution of privacy laws across the globe (e.g., GDPR, CCPA, etc.). As technology becomes more engrained in our lives and our work, it must be simple to understand and control what data is collected and easily manage who has access to that data and for what purpose.

security blind spots and gain visibility and control of data. BlueTalon provides a customer-proven, data-centric solution for data access management and auditing across the diverse systems resident in modern data estates. The IP and talent acquired through BlueTalon brings a unique expertise at the apex of big data, security and governance. This acquisition will enhance our ability to empower enterprises across industries to digitally transform while ensuring right use of data with centralized data governance at scale through Azure. Together with BlueTalon, we are committed to help enterprises become data-driven companies in a secure and compliant manner. We’re excited to welcome the BlueTalon team to Microsoft and can’t wait to get started.

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Latest News

Ericsson and Vodafone go live with 5G in Ireland

At the launch in Cork on 13 August, Ericsson presented their Mixed Reality (Urban Planning VR) Demo. It was also the launch of the Vodafone Global Center of Internet of Things excellence in healthcare in partnership with Assert. Using Baseband 6630 and AIR 6488 products from the Ericsson Radio Systemportfolio, Vodafone

components of 5G networks and firmly putting Ireland on the map of 5G innovation. “By providing solutions for almost two-thirds of all commercially launched 5G networks spanning across 4 continents, Ericsson is leading the way for the next generation of connectivity.” With the Ericsson Consumer Lab

Ireland has activated the network over their recently acquired 5G spectrum. This deployment marks one of many for Ericsson, who have 5G activations all over the world. At the launch, John Griffin, Managing Director of Ericsson Ireland said: “We work closely with our customers to be at the forefront of technology and we were the first to support the launch every generation of mobile technology in Ireland. We are therefore proud to support the first 5G launch, too. “Ericsson has been investing in Ireland for 60 years. Our Research and Development centre in Athlone is still one of the biggest in the country, where they’re currently developing key

report highlighting that consumers in Ireland expected 5G in 2021, this launch puts Vodafone and Ericsson ahead of local expectations. Speaking at the launch event, Anne O’Leary, CEO of Vodafone Ireland, said: “5G is set to revolutionize how we use and adopt technology and will have a huge impact on businesses and society in Ireland. It will bring high speed, ultra-low latency and highly secure connectivity to a massive amount of devices; and is a technology that will unlock a vast array of new use cases through Vodafone’s next-generation network.”

Sceptre mission planner takes the Royal Air Force a digital leap forward

The system, Sceptre, draws on huge amounts of command and control information needed to plan and deliver a successful mission and presents this in a simple and actionable way. BAE Systems has been awarded a contract to deliver Sceptre to the RAF to transform the way it plans, briefs, executes and debriefs missions on the Typhoon fleet.

performance data. Sceptre is a modular application capable of being used on a variety of devices including tablets, personal computers and interactive touch tables used for briefing and de-briefing missions. It enables the operator to effectively be ‘airborne’ with high situational awareness

and able to make better, more informed, decisions to achieve mission success. Sceptre helps the operator create a tactically astute plan, holistically reviewed, catering for conflicts and contingencies. Louise Aiken, Head of Mission Planning Programmes –

The system combines three-dimensional in cockpit views, representation of digital aeronautical flight information, potential hazards and conflict detection with real time weather information, an intelligence picture and fast jet

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Mission Support & Training Services, BAE Systems, said: “We have worked with pilots and our customers to create a highly intuitive system in Sceptre which delivers a wealth of information in simple, actionable way that has not been possible before. “In today’s world, a pilot does not have time to decipher multiple pages of information and this is where Sceptre gives them information in a clear way to allow them to focus on the mission.

“By getting information to them quickly, accurately and clearly, Sceptre allows them to make better, more informed decisions. “We are constantly looking at new ways to exploit technology to develop our products and capabilities and Sceptre is a great example of how we’re taking these technologies on to the frontline.” Sceptre is also key for mission debriefing of merging the real world and synthetic views exploiting all aircraft recording media into an integrated replay format.

Samsung Takes Mobile Photography to the Next Level with Industry’s First 108Mp Image Sensor for Smartphones Samsung Electronics, a world leader in advanced semiconductor technology,

filming, the HMX supports video recording without losses in field-of-view at resolutions up to 6K (6016 x 3384) 30-frames-per-second (fps). “For ISOCELL Bright HMX, Xiaomi and Samsung have worked closely together from the early conceptual stage to production that has resulted

introduced 108 megapixel (Mp) Samsung ISOCELL Bright HMX, the first mobile image sensor in the industry to go beyond 100 million pixels. With the latest addition, Samsung will expand its 0.8μm image sensor offerings from its

in a groundbreaking 108Mp image sensor. We are very pleased that picture resolutions previously available only in a few top-tier DSLR cameras can now be designed into smartphones,” said Lin Bin, co-founder and president of Xiaomi. “As we continue our partnership, we anticipate bringing not only new mobile camera experiences but also a platform through which our users can create unique content.” “Samsung is continuously pushing for innovations in pixel and logic technologies to engineer our ISOCELL image sensors to capture the world as close to how our eyes perceive them,” said Yongin Park, executive vice president of sensor business at Samsung Electronics. “Through close collaboration with Xiaomi, ISOCELL Bright HMX is the first mobile image sensor to pack over 100 million pixels and delivers unparalleled color reproduction and stunning detail with advanced Tetracell and ISOCELL Plus technology.” Mass production for Samsung ISOCELL Bright HMX will begin later this month.

recently announced ultra-high 64Mp to 108Mp, a resolution equivalent to that of a high-end DSLR camera. Samsung ISOCELL Bright HMX is a one-of-a-kind mobile image sensor and is the result of close collaboration between Xiaomi Corp. and Samsung. With over 100 million effective pixels enabling extremely sharp photographs rich in detail, the ISOCELL Bright HMX also produces exceptional photos even in extreme lighting conditions. Being the first mobile image sensor to adopt a large 1/1.33-inch size, the HMX can absorb more light in low-lit settings than smaller sensors and its pixel- merging Tetracell technology allows the sensor to imitate big-pixel sensors, producing brighter 27Mp images. In bright environments, the Smart-ISO, a mechanism that intelligently selects the level of amplifier gains according to the illumination of the environment for optimal light-to- electric signal conversion, switches to a low ISO to improve pixel saturation and produce vivid photographs. The mechanism uses a high ISO in darker settings that helps reduce noise, resulting in clearer pictures. For advanced

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A 3D technology toolbox in support of system-technology co-optimization Julien Ryckaert & Eric Beyne, Imec

System-technology co-optimization (STCO) – enabled by 3D integration technologies – is seen as a next ‘knob’ for continuing the scaling path. Eric Beyne, imec fellow and program director of imec’s 3D system integration program and Julien Ryckaert, program director 3D hybrid scaling at imec, unravel the STCO principle, open up the 3D technology toolbox and bring up two promising cases: logic on memory, and backside power delivery. After DTCO comes STCO... For many years, the semiconductor industry has lived in an era of ‘happy scaling’ – driven by the Law of Gordon Moore. In this era, dimensional scaling alone could provide each new technology generation with the required power- performance-area-cost benefits. But the last 15 years, the chip industry has not been following that happy

scaling path anymore. Dimensional scaling started to provide diminishing returns, marking the end of that era. Fromthe 10nmtechnology generation onwards, traditional scaling has been complemented by design-technology co-optimization (DTCO), combining expertise from technology as well as from design. In this DTCO era, track height reduction and a growing number of structural scaling boosters have been introduced, allowing to scale standard cells and static random access memories (SRAMs) to an extreme level of compactness. Scaling boosters include, for example, self-aligned gate contact, metal-gate cut and supervia. But as we move further and look at the benefits of what DTCO can bring at system-on-chip (SoC) level, we can expect a certain saturation – especially when we start considering global access and power delivery to the SoC.

Therefore, for 3nm and beyond technology nodes, we will need to shift focus from scaling at logic cell level towards scaling at system level. Hence, DTCO is evolving into an STCO-oriented approach. STCO: a clever way of disintegration In general, STCO involves the disintegration and reintegration of a SoC. A SoC is composed of various (heterogeneous) sub-systems (functions) that are interconnected by a complex wire scheme. When disintegrating a SoC, it should be decided in a clever way at what level in this wiring interconnect hierarchy the system is cut into different partitions. But how can this be done? What components belong together, and which should be processed separately? Most often, a trade- off is to be made between the

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interconnect granularity – the level of granularity at which the different parts of the system will be reconnected – and the technology heterogeneity. For example, if we want to reach a very fine interconnect granularity, we will not be able to reconnect a wide variety in technologies. After dis-integration, each of these sub-systems can then be designed and processed separately, with the most appropriate technology. Following this approach, we will move away from a longstanding guiding principle that has been used to make ever more advanced systems-on-chip: the universality of CMOS technology. So far, all the different functions on a chip (including, for example, logic, memory, I/O interfaces, power etc) were hooked onto one and the same CMOS technology platform. Scaling of that CMOS technology has enabled ever more performant systems. But as SoCs are becoming increasingly more heterogeneous, it will be more advantageous to use a different process technology – which could as well be multi-node variations of one technology – for the different needs of the sub-systems. Memory, for example, does not need to be process-compatible with logic. Or, think about sensors and other analog functionalities that do not really benefit from using ultimately scaled technologies. For these functions, simpler processes and more relaxed lithography can be used. With this approach, we expect to make even more progress in terms of power, performance, area and cost – offering new scaling opportunities for future electronic systems. Reintegration: 3D integration technologies to the rescue After disintegrating the SoC and optimizing the different sub-systems,

Figure 1: From DTCO to STCO

they need to be reintegrated in a smart way by using one of the available 3D integration technologies. Different 3D integration technologies can be applied at different levels of the interconnect hierarchy, spanning an exponential scale in interconnect density (i.e. the number of connections per mm2) – from the mm-scale to the nm-scale. This 3D interconnect technology landscape can be illustrated with the graph below. The graph represents the various 3D integration approaches with respect to the achievable 3D interconnect density and pitch. At the ‘coarser’ left side of the graph are the technologies that are typically being used if only a limited number of connections is needed between the system’s sub-components. Here, partitioning is done at package level, by stacking packages on top of each other. This system-in-a package (SiP) approach has been illustrated for the case of DRAM stacking. Coarse contact pitches in the order of 400µm can be achieved. As an alternative approach to SiP, multiple die can be integrated in a single package using passive interposers – known as 2.5D integration. This is for example being used for ‘chiplet’ style of manufacturing. Or, one of the many fan-out wafer-level packaging flavours can be applied, which are an attractive solution

for mobile applications such as smartphones – as they potentially enable cost-effective wide I/O die- to-die interconnects in small form factors. Many of these techniques use horizontal as well as vertical interconnections. Higher 3D interconnect densities can be achieved by using die-to- wafer stacking techniques, where finished dies are bonded on top of a fully processed wafer. Dies are interconnected using through-Si vias (TSVs) or microbumps. Imec’s goal is to bring these microbump pitches down, below 10µm. Next come wafer-to-wafer bonding techniques, enabling true 3D system-on-chips. These are packages in which partitions with varying functions and technologies are stacked heterogeneously, with interconnect pitches in the order of 1µm. Either hybrid wafer-to-wafer bonding or dielectric wafer-to-wafer bonding techniques can be applied. The highest interconnect density is realized so far by using sequential processes. Ultimately, transistors can be stacked on top of each other, achieving contact pitches as small as 100nm. The true value of these sequential processing is whenever a second layer needs to have a lithography precision of alignment with respect to the bottom layer. An interesting application that can

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potentially benefit from this precise alignment, is ‘array under CMOS’ – involving splitting up the periphery from the array. This approach could be considered for applications such as imagers or selectors for memory. An unusual roadmap It is important to note that this 3D landscape should not be read like a timeline from left to right. There is no single packaging technology that can serve all needs. Instead, the different 3D integration options exist next to each other, and can even co-exist in one and the same system. And each option has its own roadmap, with interconnect densities and pitches improving in time. But the choice of what is the best 3D integration technology entirely depends on the application, and on the ‘traffic’ between each element that you partition. It is a collection of technologies that allow a system to be integrated into a much smaller form factor, with optimized performance and power, and at lower manufacturing cost – in support of STCO. Where logic and 3D meet: two STCO cases Various functions of a SoC (such as image sensors or memory components) have already been subject to partitioning and reintegration by using one of the available 3D integration technologies. But so far, the logic part of the system has mainly stayed out of this ‘3D picture’. Below, two cases illustrate how this has recently changed: the case of logic on memory, and the case of backside power delivery. Theywill showhow logic and 3D start to meet in the STCO framework, and how smart partitioning can provide a knob for further CMOS scaling.

Figure 2: The 3D technology integration landscape

Benefits of this approach are a potential reduction in die area, and an obvious reduction in footprint. It also allows functional memory (e.g. the level-2 cache) to be positioned in close proximity to the logic it serves, with the average line length being the vertical spacing between the two components. This results in increased performance (interconnect bandwidth) at reduced power consumption. Backside power delivery The goal of a power delivery network is to provide power and reference voltage to the active devices on the die. This network is essentially a network of interconnects that is completely separate from the signal network. Traditionally, both the signal and power networks are processed in

In both cases, we consider three key functions of the SoC: logic core, cache memory and storage, and power delivery. Logic on memory In traditional systems, a memory array is placed next to the logic core that it supports. This gives an average interconnect line length that depends on both the spacing between the two devices and the bump pitch on the individual die. Alternatively, functional partitioning and wafer-to-wafer bonding techniques can be used to stack the memory vertically on top of the logic component. The memory can be manufactured in a memory-optimized process on one wafer, and core logic can be manufactured on another.

Figure 3: Principle of functional backside power delivery network using nano-TSV to contact buried power rails through ultra-thin Si device layers.

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the wafer’s back-end-of-line – which is at the front-side of the Si wafer. We can also envision to provide the global power from the backside of the wafer. From there, this network of interconnects can connect to a buried power rail, a scaling booster in the form of a local power rail that is buried in the chip’s front-end-of-line. In practice, this backside processing can be done by first hooking the CMOS processed wafer onto a carrier using wafer-to-wafer bonding. Then, the wafer’s backside is thinned down with an extreme level of thinning – to about a few 100nm. This allows to expose nm-scale through-Si vias that run from the wafer frontside to the backside and connect them with extremely fine granularity. By directly delivering power to the standard cells through the backside, the imec team recently demonstrated a 30% area scaling benefit. In addition, implementing the power delivery network in the backside can relieve the frontside (i.e., the back-end-of- line or BEOL) from power routing, which reduces the BEOL complexity. It also improves the supply voltage drop (or IR drop, which is caused by a resistance increase in the back- end-of-line), providing up to 15% performance enhancement. It is interesting to note that this concept of functional backside processing can be extended beyond power delivery. One can start thinking of implementing other functions within the wafer’s backside, including, for example, metal- insulator-metal (MIM) capacitors, electrostatic discharge (ESD) devices or indium-gallium-zinc-oxide (IGZO) transistors. In summary... With DTCO running out of steam, we are now at the eve of a new age: the era of STCO – where scaling at logic cell level will be complemented by scaling at a global system level. STCO

Figure 4: Backside power delivery network: first hardware demonstration

involves the SoC to be disintegrated, and subsequently reintegrated by using one of the available 3D integration technologies. These technologies can be applied at different levels of the 3D interconnect hierarchy, from the package to the die, to the wafer, to the standard cell and even to the transistor level. Two cases – logic on die, and backside power delivery – illustrate how this STCO framework is now also penetrating the logic world – providing further knobs for continuing the scaling path. About Julien Ryckaert Julien Ryckaert received the M.Sc. degree in electrical engineering from the University of Brussels (ULB), Belgium, in 2000 and the PhD degree from the Vrije Universiteit Brussel (VUB) in 2007. He joined imec as a

converters. In 2010 he joined the process technology division in charge of design enablement for 3DIC technology. Since 2013, he is in charge of imec’s design-technology co-optimization (DTCO) platform for advanced CMOS technology nodes. He is now program director focusing on scaling beyond the 3nm technology node as well as the 3D scaling Eric Beyne obtained a degree in electrical engineering in 1983 and the Ph.D. in applied sciences in 1990, both fromtheKatholiekeUniversiteit Leuven, Belgium. Since 1986 he has been with imec in Leuven, Belgium where he has worked on advanced packaging and interconnect technologies. Currently, he is imec fellow and program director of imec’s 3D system extensions of CMOS. About Eric Beyne

mixed-signal d e s i g n e r in 2000 s p e c i a l i z i n g in RF transceivers, u l t r a - l o w power circuit t e c h n i q u e s and analog- t o - d i g i t a l

i n t e g r a t i o n program. He received the European Semi Award 2016 for contributions to the development of 3D technologies.

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Understanding Component Shortages (and How to Survive Them)

Graham Scott,Vice President of Global Procurement, Jabil

Managing 700,000 parts across 27,000 suppliers at any given time provides us with unique insight into key commodity trends, strategies and shortages. Therefore, it goes without saying that it's been an interesting few years in direct procurement. Since 2017, companies managing electronic components have been facing challenging times with successive waves of supply shortages, price hikes and lengthening lead times. A major surge in demand on one side and a critical shortage of parts and materials on the other are straining capabilities to meet demand. As a result, the market today is extremely constrained, especially for more standard passive components such as multilayer ceramic capacitors

(MLCC), resistors, transistors, diodes, and even memory. Many suppliers are quoting lead times averaging 20-30 weeks. We haven't seen anything like this since 1999, when lead times for tantalum hit a high of more than 52 weeks and created widespread supplier allocation due to unexpectedly high OEM demand. Suppliers eventually added additional capacity, but price increases and supply shortages continued until demand stabilized and technology shifted. What is contributing to today's turbulent landscape? As suppliers review their portfolios and make calculated bets on investments, they are shifting their capacity to leading-edge technologies

that primarily support the automotive, smartphone and Internet of Things (IoT) markets. Many of the capital investments suppliers have made over the past few years are starting to come online adding extra capacity to the ecosystem. Suppliers will closely monitor production to align with overall demand and prevent any overshot (inventory bubble) to keep a reasonable supply/demand balance. It’s critical that OEMs closely monitor the “technology roadmaps” of the supplier community. Not aligning Approved Vendor Lists with technology roadmaps in conjunction with the end product’s lifecycle could lead to potential supply disruptions and higher component prices.

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How the Automotive Industry Influences The Passives Market The automotive industry has been experiencing a rapid transformation with products incorporating electronic components at an unprecedented rate. While we may be a few more years away from fully autonomous vehicles, cars are evolving to become even more sophisticated: with embedded software, sensors, artificial intelligence, connectivity, and yes, electrification. Think of today's standard combustion engine car, which has somewhere between 2,000 to 3,000 capacitors. As the electric vehicle gains market share, this creates an overwhelming growth in content—with up to 22,000 MLCCs required in a single car. This number will continue to grow as more functions become electrified. Automotive-grade electronics sell at a higher price, due to the additional requirements around warranty and

liability. Demand from the automotive sector is also somewhat stable with accurate forecasts. This makes the automotive market a high priority for passive suppliers. Smartphone Miniaturization Leads to Component Supply Shortages The smartphone industry is constantly on the move. As consumers expect the release of a greater model each year, leading smartphone launches have become anticipated events. For passive components and memory products, smartphones represent a significant part of overall consumption. The math is simple but insightful. There are approximately 1.5 billion smartphones manufactured per year and each flagship model contains roughly 1,000 capacitors. With the total global output of MLCC sitting at roughly three trillion pieces per year,

you can quickly deduce that nearly 50 percent of the MLCC output goes directly to smartphone manufacturers. This makes the smartphone market the primary driver of consumption and technology. A slowdown in the smartphone market has created an opportunity for greater supply. Smartphone sales have peaked recently. If an uptick in demand happens it could flip the supply/demand picture. How does the IoT Boom Affect Component Supply Shortages? There will be more than 20 billion IoT devices deployed by 2020 according to Gartner, representing more than 100 percent growth in the number of these devices in the next two years. OEMs are working to leverage connectivity features to their advantage, introducing electronic components to previously analog products—doorbells, light switches,

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we can expect to see ongoing supply issues in legacy and mature products. OEMs that don't transition to modern components further up the technology curve must be prepared to battle for components every single day. The current conditions amplify the need to have supply chain involvement in all areas of your business, from design to pre-production all the way to end-of-life management and product delivery. If you miss out working on any of these areas, you run the risk of having a disrupted product. In a Component Supply Shortage, Relationships are Key In an effort to keep the market somewhat balanced, suppliers are turning to allocation methods. When supply is short of meeting demand, suppliers allocate a percentage of their output to each customer. This means that each customer may get a percentage of the demand they have for a specific product. The allocation process is tough on all buyers of components and requires constant contact with the suppliers to ensure receipt of components for the product they need versus the product the supplier wants to support. Dur i ng sho r t ages , supp l i e r s determine who to support. We can't emphasize the importance of supplier relationships enough. Whether you are doing the work yourself or outsourcing to a manufacturing solutions provider like Jabil, strong supplier relationships are essential to surviving component shortages. But let me clarify. These "strong" relationships don't begin during

supply shortages; they must be established during a buyer's market.

paper dispensing products and more. This explosion of growth unlocks new business opportunities and models for OEMs worldwide, but it creates additional demand on an already constrained market. Where are Component Supply Shortages Headed? These moves have created a high- risk environment for mature, less- profitable product families. Suppliers that continue to manufacture components for legacy products will only produce parts at profitable levels, leading to price increases for the wider customer base. The market is softer due to macroeconomic events and global uncertainties. This, in turn, has led suppliers to soften their position with regards to the rapid technology transition many spoke of. Although suppliers still have the strategic outlook to move to newer products due to factory utilization, we’re seeing some additional short-term support for legacy products. Jabil's procurement intelligence team is forecasting that the current supply/ demand cycle for automotive-grade and legacy ceramic capacitors could be as long as four years. As we look toward the next five years, you can expect a supply recovery on products that are attractive investments to suppliers—the latest and greatest technologies. Jabil's procurement intelligence team is forecasting that the current supply/ demand cycle for automotive-grade and legacy ceramic capacitors could be as long as four years. Meanwhile,

Surviving a Component Supply Shortage as an OEM The decisions you make right now will affect your longevity. These types of supply shortages separate the good from the bad and there are companies that will struggle to meet their production goals if they are not taking today's market seriously and responding to the component/ technology evolution. Although there are no silver bullets to success, there are several steps companies can take to stay ahead of the market: Continually evolve product design to align with supplier's technology and production roadmaps Add new alternative suppliers Move away from single-sourced parts Increase collaboration and visibility between product design, procurement and supply chain organizations As basic as it sounds, having multiple sources per part is no longer just a nice-to-have – it is a requirement. In today’s market, with options becoming limited, having the ability to rapidly select alternative qualified suppliers and keeping your products on schedule is even more critical.

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