New-Tech Europe Magazine | Q1 2023

Vertical power delivery is the ultimate solution in terms of delivering very high current at low processor core voltages with the lowest PDN resistance. In this case, current multipliers and bypass capacitors are stacked on each other to form an integrated power module (geared current multipl ier) that can be mounted directly underneath the processor by displacing the bypass capacitor bank. Vicor GCMs are custom-built devices that map the current multiplier pinouts to the AI processor BGA in addition to being able to provide all the bypass capacitor needs within the module itself. This technique opens up the top floor of the PCB for high-speed signal routing from the periphery of the processor to realize a solution with the highest signal integrity. Applications such as

power losses across the PDN. The propriety architectures, topologies and small module size are unique in the power industry. And for the next generation processors to operate at full capacity they need a power solutions that that can adapt, scale and deliver high-density power. Robust, reliable power modules in conjunction with innovative topologies are essential in a dynamic systems where power requirements change rapidly. AI, machine learning and edge-computing will never have enough power for tomorrow using traditional power architectures. To meet that perpetual need you need to innovate today and be prepared to adapt and scale for tomorrow using modular power.

CPO (co-packaged optics, networking processors) and high-speed signaling ASICs can take advantage of this power delivery technique. The Vicor architectures are flexible enough to be adapted a wide variety of high-performance computing solutions. Vicor solutions can reduce motherboard resistances up to 50x and processing power pin count more than 10x. Leveraging a Factorized Power Architecture (FPA™), Vicor minimizes the “last inch” resistances with patented solutions combining, lateral power delivery (LPD) and vert ical power del ivery (VPD). All enable processors to achieve previously unattainable performance levels to support today’s exponentially growing HPC processing demands. The FPA architectures are unmatched in current density and in reducing

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New-Tech Magazine Europe l 23