New-Tech Europe Magazine | July 2016 | Digital edition

savings. Continuously optimizing the power- conversion architecture and bus voltages will yield improvements in each converter. In a power supply comprising an IBC operating at 93% and a POL operating at 88%, an improvement of just 1% in each stage can reduce the power dissipated from 18.1% of the input power to 16.3%. This not only represents a 10% reduction in power losses, but also relieves the load on the data-center cooling system thereby delivering extra energy savings. Software Defined Power Requires Collaboration While these first adaptive control features mark the beginning of software-defined power architectures, many additional and even more powerful techniques are expected to emerge, assisted by the arrival in the market of digitally-controllable PMBus-compatible IBC and POL supplies from a range of vendors. PMBus is vital in supporting the power supply designs that are needed to meet the IoT challenge. However an issue that still has to be addressed is the “plug and play” compatibility between supplies that appear to offer similar specifications but behave differently when sent the same PMBus command. The formation of the Architects of Modern Power ® (AMP) Group in October 2014 has further strengthened the case for digital control through its activities in specifying standards for the interoperability of IBC and POL supplies. This includes standardizing the interpretation of PMBus commands to ensure that all supplies that comply with AMP Group ® standards will operate in the same way in response to a given command. One of the key objectives of the AMP

Figure 2. The traditional fixed distributed power architecture suited earlier generations of servers

these converters a host controller can optimize input and output voltages and send commands to manage other aspects of device operation, such as enable/disable, voltage margining, fault management, sequencing, ramp- up, and tracking. The controllability enabled by PMBus is allowing system designers to power architectures that are increasingly software defined and able to respond in real-time for optimum efficiency. Some of today’s most powerful techniques for optimizing efficiency include Dynamic Bus Voltage (DBV) optimization, Adaptive Voltage Scaling (AVS), and multicore activation on demand. DBV provides a means of adjusting the intermediate bus voltage dynamically to suit prevailing load conditions. At higher levels of server-power demand, PMBus instructions can command a higher output voltage from the IBC in

order to reduce the output current and hence minimize distribution losses. AVS is a technique used by leading high-performance microprocessors to optimize supply voltage and clock frequency to ensure processing demands are always satisfied with the lowest possible power consumption. This also provides automatic compensation for the effects of silicon process variations and changes in operating temperature. To support AVS, the PMBus specification has recently been revised to define the AVSBus, which allows a POL converter to respond to AVS requests from an attached processor. Multicore activation on demand provides a means of activating or powering down the individual cores of a multicore processor in response to load changes. Clearly, de-activating unused cores at times of low processing load can help to gain valuable energy

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