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ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 21 NO. 3 24 ABOUT THE AUTHORS

16. S. Tajik, J. Fietkau, H. Lohrke, J-P Seifert, and C. Boit: “Pufmon: Security Monitoring of FPGAs using Physically Unclonable Functions,” 23rd Symposium on On-Line Testing and Robust System Design (IOLTS), IEEE, 2017, p. 186-191. 17. H.Shen,N.Asadizanjani,M.Tehranipoor,andD.Forte:“Nanopyramid: An Optical Scrambler Against Backside Probing Attacks,” Proc. Int. Symp. Test. Fail. Anal. (ISTFA), 2018, p. 280.

14. H. Wang, D. Forte, M. Tehranipoor, and Q. Shi: “Probing Attacks on Integrated Circuits: Challenges and Research Opportunities,” IEEE Design & Test, 2017, 34 (5), p. 63-71. 15. S. Tajik, H. Lohrke, F. Ganji, J.-P. Seifert, and C. Boit, “Laser Fault Attack on Physically Unclonable Functions,” Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC), IEEE, 2015, p. 85-96.

M. Tanjidur Rahman is a Ph.D. student in electrical and computer engineering at the University of Florida, Gainesville. He received his B.S. and M.S. degrees in electrical engineering in 2012 and 2014, respectively, from Bangladesh University of Engineering and Technology. He is a student member of IEEE. He received the IEEE Best Paper Award at the International Conference on Computer and Electrical Engineering, Bangladesh. His research interests include hardware reverse engineering, hardware assurance, and security of ICs using physical inspection/attack methods. Navid Asadizanjani received a Ph.D. in mechanical engineering from the

University of Connecticut in 2014. He is an assistant professor in the electrical and computer engi- neering department at the University of Florida, Gainesville. His primary research interests include physical attacks and inspection of electronics. Asadizanjani received several best paper awards from the International SymposiumonHardwareOriented Security and Trust and International Symposium on Flexible Automation. He also received the D.E. Crow Innovation award from the University of Connecticut. He is the program chair of the PAINE conference and serves on the technical program committee of the International Symposium for Testing and Failure Analysis and IEEE Computing and Communication Workshop and Conference.

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Another expectation was that beyond-CMOS circuits would not require MOSFETs and may even get rid of any charge currents in the quest for energy efficiency. This did not prove to be true: A thorough circuit analysis reveals that a MOSFET transistor is needed to supply power, and to clock and control the logic circuit operation. In my keynote

latest results of beyond-CMOS device-circuit benchmark- ing will be reviewed. ABOUT THE AUTHOR Ian Young is a senior fellowand director of Exploratory Integrated Circuits in the Technology and Manufacturing Group of Intel Corp. He joined Intel in 1983 and currently leads a research group exploring future options for amore energy efficient integrated circuit technology beyond CMOS. His recent work developed a uniform benchmark- ing methodology to identify the key technology options in quantum nano-electronics and nano-magnetics, such as tunneling junction field-effect devices and spintronics. Young earned a bachelor’s degree in electrical engi- neering and amaster’s degree in engineering science from the University of Melbourne, Australia, as well as a Ph.D. in electrical engineering from the University of California, Berkeley. He received the 2018 IEEE Frederik Philips Award “for leadership in research and development on circuits and processes for the evolution of microprocessors.” Young is a Fellow of IEEE.

address, an analy- sis of research in quantum electron- ics and magnetics for beyond-CMOS devices will be pre- sented.Somedevice proposals and dem- onstrations will be reviewed. Based on

Courtesy of S. Manipatruni, et al.: Nature, 2019, 565, p. 35-42.

this analysis, trends in the beyond-CMOS device-circuit research field will be identified. Principles for the devel- opment of competitive computing technologies that have been formulated will also be presented. In addition, the

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