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image preprocessing step involves the use of image pro- cessing techniques to remove as much noise as possible to make the presence of the features of interest more prominent. The feature extraction step uses a computer visionmethod to extract salient image object features. The final step consists of using the extracted features as input tomachine learning algorithms todetermine the presence of features of interest or annotate them in the image. To date, relatively little research has been performed on the use of computer vision and machine learning methods for reverse engineering or to detect hardware trojans. Therefore, important research challenges are still unad- dressed and provide a roadmap for future efforts. Critical challenges to the development of automated image analysis/machine learning-basedmethods include noisy images, unoptimized feature representation, and lack of training data for machine learning algorithms. SEM imagery typically contains a considerable amount of noise, which can affect the reliable extraction of object features. The common techniques used for noise removal in digital images may not be suitable for this application. The development of noise removal techniques specific to SEM imagery would be an important research contribu- tion. The number of objects within an SEM image may be on the order of billions. Therefore, extraction features not only should be robust against noise and capture relevant information about the object, but also must be com- puted quickly. Feature extraction methods and feature representations specific to the problem of hardware trojan detection or reverse engineering in SEM imagery are necessary to meet these requirements. There have been many advances in the area of machine learning as it applies to classification. However, to leverage progress in machine learning, large sets of data that represent the problem space are required to train machine learning algorithms. One possible approach involves techniques to synthesize realistic training data using machine learn- ing methods such has generative adversarial networks. Meeting these challenges is critical for developing an automated reverse engineering and trojan detection tool based on SEM imagery. CONCLUSION This article presents a comprehensive study of dif- ferent physical inspection/attacks, the prospect and challenges of physical inspection methods as an emerg- ing trust verification tool, and the dire threat imposed by physical attacks on SoCs. Automation of FA tools is a major challenge to be resolved in order for physical inspection methods to serve as root of trust verification tools. Progress in computer vision and machine learning

promise a bright future for the automation of FA tools. Addressing issues such as the lack of processing tech- niques for images collected from microscopes and the lack of a training database for machine learning would be major contributions toward developing hardware trojan detection methods. Protecting both the front side and backside of the chip against physical attacks appears to be another major challenge for security engineers, given the fact that the same methods are used for chip FA. Identifying vulnerable regions on ICs and developing active countermeasures against physical attackswouldbe significant advancements in hardware trust and security. REFERENCES 1. M. Tehranipoor and F. Koushanfar: “A Survey of Hardware Trojan Taxonomy and Detection,” IEEE Design & Test of Computers , 2010, 27 (1) p. 10-25. 2. S. Bhunia, M.S. Hsiao, M. Banga, and S. Narasimhan: “Hardware Trojan Attacks: Threat Analysis and Countermeasures,” Proceedings of the IEEE, 2014, 102 (8), p. 1229-1247. 3. M. Holler, M. Guizar-Sicairos, E.H. Tsai, R. Dinapoli, E. Muller, O. Bunk, J. Raabe, and G. Aeppli: “High-Resolution Non-Destructive Three-Dimensional Imaging of Integrated Circuits,” Nature, 2017, 543 (7645), p. 402. 4. N. Asadizanjani, M. Tehranipoor, and D. Forte: “PCB Reverse Engineering using Nondestructive X-ray Tomography and Advanced Image Processing,” IEEE Trans. Compon. Packag. Manuf. Technol., 2017, 7 (2), p. 292-299. 5. C. Bao, D. Forte, and A. Srivastava: “On Application of One-Class SVM to Reverse Engineering-Based Hardware Trojan Detection,” 15th International Symposium on Quality Electronic Design (ISQED), IEEE, 2014, p. 47-54. 6. N. Vashistha, M.T. Rahman, H. Shen, D.L. Woodard, N. Asadizanjani, and M. Tehranipoor: “Detecting Hardware Trojans Inserted by Untrusted Foundry using Physical Inspection and Advanced Image Processing,” Journal of Hardware and Systems Security, 2018, 2 (4), p. 333-344. 7. U. Guin, K. Huang, D. DiMase, J.M. Carulli, M. Tehranipoor, and Y. Makris: “Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain,” Proceedings of the IEEE, 2014, 102 (8), p. 1207-1228. 8. B. Shakya, N. Asadizanjani, D. Forte, and M. Tehranipoor: “Chip Editor: Leveraging Circuit Edit for Logic Obfuscation and Trusted Fabrication,” Proc. 35th Int. Conf. on Computer-Aided Design (CCAD), ACM, 2016, p. 30. 9. E.L. Principe, N. Asadizanjani, D. Forte, M. Tehranipoor, R. Chivas, M. DiBattista, S.E. Silverman, M. Marsh, N. Piche, and J.T. Mastovich: “Steps TowardAutomatedDeprocessing of IntegratedCircuits,” Proc. Int. Symp. Test. Fail. Anal. (ISTFA), 2017. 10. H.S. Anderson, J. Ilic-Helms, B. Rohrer, J. Wheeler, and K. Larson: “Sparse Imaging for Fast Electron Microscopy,” Proc. SPIE 8657, Computational Imaging XI, February 2013. 11. C. Boit, C. Helfmeier, and U. Kerst: “Security Risks Posed by Modern IC Debug and Diagnosis Tools,” 2013 Workshop on Fault Diagnosis and Tolerance Cryptography (FDTC), IEEE, 2013, p. 3-11. 12. “EBIC/EBAC Techniques for Semiconductor Failure Analysis,- Imina Technologies SA,” 2018, [Online] Available: https://www.imina.ch/ applications/ebic-ebac-nanoprobing-failure-analysis-sem. 13. Q. Shi, H. Wang, N. Asadizanjani, M.M. Tehranipoor, and D. Forte: “A Comprehensive Analysis on Vulnerability of Active Shields to Tilted Microprobing Attacks,” in AsianHardwareOriented Security and Trust Symposium (AsianHOST) , IEEE, 2018, p. 98–103.

ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 21 NO. 3

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