new products
79 l New-Tech Magazine
and portable game stations. Its
small form factor also suits very thin
platforms like mobile phones and
emerging devices such as smart
watches and wearables. In addition
to these consumer applications,
FCI’s USB 3.1 Type C connector is
also targeted at the industrial and
instrumentation markets.
Manufactured
with
a
high-
temperature thermoplastic housing,
stainless steel shell and with copper
alloy terminals, the devices have
low-level contact resistance and
deliver up to 5A maximum current,
with configurable voltage of up
to 20V. Operating temperature
is -55degC to +105degC. RoHS
compliant, lead-free and halogen-
free, the new USB 3.1 Type C
meets environmental, health and
safety requirements. Plugs and
receptacles are available with
vertical or right angle orientation
and are supplied packaged on tape
and reel for automated assembly.
TI’s new oscillator family
offers the industry’s lowest
jitter to optimize signal
integrity in performance-
critical applications
Texas Instruments (TI) (NASDAQ:
TXN) today introduced a family of
fully programmable, pin-selectable
and fixed-frequency 7-mm-by-
5-mm differential oscillators that
provides the industry’s lowest jitter
of 90 femtoseconds (fs), which
enables designers to optimize
signal integrity and reduce data-
transmission errors in performance-
critical applications. The LMK61xx
family enables easy customization,
frequency margining and support
for multiple frequencies on one
device to clock field-programmable
gate arrays (FPGAs), analog-to-
digital converters (ADCs), digital-
to-analog converters (DACs) and
high-speed serial links. For more
information, visit
http://www.ti.com/lmk61xx-pr-eu.
Key features and benefits of
LMK61xx oscillators
Industry’s lowest jitter: 90-fs typical
root-mean-square (RMS) jitter
performance over 12 kHz to 20 MHz
is less than half that of competing
oscillators, allowing designers
to improve reliability and system
margin in communications, test
and measurement, and medical
equipment.
Flexible and easy to customize:
The family of 11 oscillators includes
programmable, pin-selectable and
fixed-frequency devices, offering
low-voltage
pseudo
emitter-
coupled logic (LVPECL), low-
voltage differential signaling (LVDS)
and high-speed current-steering
logic (HCSL) output formats, and
frequencies ranging from 10 MHz to
1 GHz. The family provides a variety
of options to meet designers’ needs.
The programmable device offers
ultimate flexibility, with an I2C
interface as well as an on-chip
electrically erasable programmable
read-only memory (EEPROM) with
100 write cycles, enabling designers
to easily customize the start-up
frequency.
The pin-selectable device offers
design flexibility by consolidating
up to seven unique frequencies and
output formats on one device.
The fixed-frequency oscillators
support fast, frequency-independent
lead times.
Reduced design cycle time:
Glitchless fine/coarse frequency
margining enables designers to
ease compliance and stress testing
of their systems during prototype
design verification.
Industry-standard 6-pin and 8-pin
oscillator footprints simplify adoption
and evaluation in existing designs
without the need for board redesign.
Tools to speed design-in process
TI offers the following tools to help
designers quickly select, evaluate
and design with the new LMK61xx
oscillators.
The oscillator customization tool
can recommend an LMK61xx
oscillator based on an application’s
programmability, output format
and frequency needs. The tool
also helps designers place custom
sample requests for applications
that have unique requirements.
LMK61xx oscillator evaluation
modules (EVMs) are available
from the TI store and authorized
distributors, priced as follows: the
programmable
LMK61E2EVM,
$US99;
the
pin-selectable
differential LMK61PDEVM, $79;
several fixed-frequency EVMs, $79.
TI’s WEBENCH® Clock Architect
tool simplifies designing with TI clock
and timing devices. The tool can
recommend a single- or multiple-
device clock-tree solution from a
broad database of devices to meet
system requirements. It features
a phased-locked loop (PLL) filter
design and phase-noise simulation
to allow designers to simulate and
optimize clock-tree designs to meet
their system needs.
Engineers can search for solutions,
get help, share knowledge and solve