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for ADAS the applicable standard is

ISO 26262. This standard defines

a number of Automotive Safety

Integrity Levels (A-SIL) which defines

the time to failure in hours. There

are four levels of A-SIL with D being

the highest and most difficult to

achieve and A the lowest. Achieving

these requirements requires an

integrated engineering delivery

lifecycle to ensure not only the target

A-SIL is achieved, but the data pack

generated also demonstrates this by

containing the necessary evidence.

Automotiveapplications are subject to

harsh environments, and as such the

developers need to ensure they use

automotive grade components, for

instance one certified to AEC-Q100,

which has been manufactured and

qualified to a higher standard than

commercial components.

They must also consider the security

of the system that is preventing

un-authorised people from making

modifications to the system, as this

could potentially lead to catastrophic

results.

Using an All Programmable SoC

Zynq support for Any to Any interfacing with sensors and consumers

Automotive

Special Edition

pipeline can be generated using a

number of provided IP libraries and

more specialist IP cores supplied by

specialist vendors reducing the time

to market.

Should we want to develop additional

algorithms we can utilize the suite

of High Level Synthesis tools like

Vivado® HLS, SDSoC™ and Matlab

to accelerate the development.

Rather than developing the IP using

a traditional Hardware Description

Language like VHDL or Verilog we

can use a higher level language like C

or C++ reducing the time to market.

Further acceleration of the algorithm

can be achieved using open source

frameworks like OpenCV, algorithms

developed using this framework can

be mapped into a HLS video library

supported by both Vivado HLS and

SDSoC. This eases the transition from

proof of concept and demonstration

to the algorithms running in the

target hardware for characterisation

and qualification.

Many implemented architectures

will use the processor DDR memory

as a frame buffer, this enables the

processor to access the images

as necessary for further onwards

transmission if using an Ethernet

based system or PCIe for example.

We can also use the power of

the processor system to perform

additional

image

processing

algorithms upon the images stored

within the DDR before re-insertion

into the image processing chain is

necessary.

This provides a very interesting

capability that the SoC itself can form

its own prototype and demonstration

platform. Using common embedded

vision development frameworks

like OpenCV running on the cores

within the processor, this provides

for a down to size prototype

system. This system can then be

optimised for performance using the

programmable logic side of the SoC.

Safety and Security

The very nature of ADAS is that it

contributes to automotive safety,

and as such systems must be

developed in line with a standard like

many other high reliability systems,

48 l New-Tech Magazine Europe