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follow schedules or five-year plans.
It occurs through the rapid, dynamic,
collective interaction across borders
and time zones. The rise of these
hardware hipsters, interacting with
other startups in the new growth
markets is referred to as substream
innovation. It is new, definitely cool,
and it is changing the way innovation
is done in this era of the Internet of
Everything.
The anatomy of silicon IoT applications
Admittedly, investment and media
interest are drawn to the possibilities
of huge data collections generated by
the new wireless, perceptive systems.
But to turn physical data into bits,
you need hardware, and you need it
to be smart and accurate. Here are a
few aspects where the new hardware
hipsters make a difference.
“A typical IoT product consists of
several digital and analog components
that need to be interconnected,
packaged and protected from the
harsh environments encountered
in day to day life,” says Jeroen Van
Ham from ICsense. “Unlike the digital
world, in the analog world there is
no real advantage in using the latest
deep submicron technology nodes.
In fact, there is little silicon area to
gain because analog circuits usually
don’t scale with shrinking transistor
sizes. For an analog designer, in
most cases it is even harder to
design the same low-noise circuit in
a smaller node because of the lower
power supply voltage, which leads
to less dynamic range. As a result,
in a typical interface application, the
preferred node still is 0.18um (either
plain CMOS or a specialty flavor for
high-voltage support). There is no
use in trying to map a complex analog
sensor interface to a state-of-the-art
foundry process node; it is a waste of
money.”
As for the digital side, the incremental
NRE (non-recurring engineering) cost
for integrating digital components is
often small compared to an analog-
only chip. The resulting unit production
cost of an integrated digital solution
can therefore be significantly lower
than that of (multi-chip) alternatives.
“However,” adds Ramses Valvekens,
“Few successful chips never get
updated. In the new, fast-moving
markets, it is key to make digital
designs future-proof. With scalable,
dynamic designs, it becomes possible
to roll-out a real product road map for
a chip. At Easics, we succeed in doing
that by parametrizing designs and
by generating and assembling them
using custom-designed hardware
generators and Hardware Description
Languages (HDLs). Such designs
can be efficiently targeted towards
different technologies, scaled and
reused, in whole or in parts, in follow-
on versions and derived products.”
In many new designs, the traditional
analog IP buy-in model doesn’t fit well.
Take MEMS (micro electro-mechanical
systems) sensors, often an essential
component in smart hardware. These
sensors are becoming smaller and
cheaper, thereby producing more
(Brownian) noise and making them
less sensitive to physical inputs. But
end-customers keep demanding the
same resolution and accuracy. As a
Fig 2: Number of IC-link projects in the areas of security, medical
& wearables, radio access, and imaging & vision systems. Between
the years 2011 and 2014, the number of projects in these areas
approximately doubled
Fig 3: The new hardware hipsters
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