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spread across multiple tools (GUI
+ VHDL/Verilog), it may require
multiple engineers and increase
design risk.
Figure 4 illustrates an architecture
which uses a microcontroller
(MCU) to perform the sequencing
of digitally-controlled point of
load (DPOL) supplies. The MCU
manages the DPOLs using the Power
Management Bus (PMBus), a twowire
communications protocol based on
the I²C bus. This leaves the Control
PLD responsible for supporting the
board's housekeeping functions as
well as controlling any point-of-load
DC-DC converters which have an
analog control interface (APOLs).
To simplify the software design, most
MCU-driven power management
designs
employ
Time-Based
sequencing schemes which issue
a single fixed sequence of disable
signals to power down the board
when a normal turn-off is requested
or when a fault condition is detected.
Another potential drawback of
software-based power management
is that it is slower to respond to
fault conditions (typically 10-15
milliseconds versus the microsecond-
scale response of a Control PLD).
If some fault conditions require a
faster response (or Event-Based
sequencing), a second layer of
protection may be added using the
Control PLD.
Implementing
software-based
Power Management requires both,
software for the MCU and a Control
PLD design, written in either VHDL
or Verilog.
Pros:
•
Designs are easily scalable
(for time-based sequencing only).
•
Abundant
software
development tools make MCU-based
solutions faster and easier to debug.
•
Designs can be quickly
modified using firmware updates.
•
Simpler PCB designs -
routing congestion reduced around
DPOLs
Cons:
•
More expensive BOM
•
Difficult to scale if Event
Based sequencing is required.
•
Multiple design tools required
(Verilog/VHDL + Software)
•
Mix of APOL & DPOL requires
a hybrid control solution which has
several drawbacks:
o
It cannot be simulated easily.
o
Hardware
management
functions can only be tested in a
prototype board environment.
o
Complexity increases system
Fig.6: The L-ASC10 remote sensing element.
Fig.7: - A Hardware Management system implemented using a
distributed architecture
Power Architecture #5: Power Management and
Housekeeping performed by a Control PLD with L-ASC10
(ASC) providing Distributed Voltage Sensing & control
30 l New-Tech Magazine Europe